There are many different types of memory integrated circuitry. Some of such circuitry utilizes a plurality of memory cell capacitors received within a memory array (including meaning sub-arrays) of such capacitors. Individual of the capacitors include a storage node electrode, a cell electrode, and a capacitor dielectric region received therebetween. Further in some memory circuitry, the cell electrode is commonly shared among the capacitors within a memory array. By way of example only, one existing such type of memory circuitry is dynamic random access memory (DRAM). Regardless, the memory cell capacitors which are fabricated can be of any of various shapes, including stacked, trenched, planar, and including those that have at least their capacitor storage nodes formed in a container or cup-like shape.
An existing prior art memory cell capacitor construction forms the storage node electrode of titanium nitride, and with a capacitor dielectric region comprising one or a combination of aluminum oxide and hafnium oxide. The other cell electrode is composed of three materials, namely a titanium nitride layer received on the capacitor dielectric region, conductively doped polysilicon received on the titanium nitride, and tungsten silicide received on the conductively doped polysilicon. The titanium nitride is utilized due to its extremely high step coverage during deposition to within container openings and to provide a good adhesion and barrier layer to the doped silicate glasses within which the storage node container openings are typically formed. Polysilicon also provides good conformal step coverage during deposition, and also in part functions as an oxidation barrier. Further, the conductive cell electrode layers are typically utilized for fabricating other conductive components or portions of conductive components in circuitry peripheral to the memory array. The polysilicon of such components provides a good etch stop function for etching contacts to these conductive materials in circuitry peripheral to the memory array. Tungsten silicide is utilized over the polysilicon because of its considerably higher electrical conductivity as compared to that of conductively doped polysilicon. Tungsten silicide is typically physical vapor deposited.
The typical above prior art memory cell capacitor construction forms the titanium nitride of the cell electrode in the form of a continuous layer which lines all of the trenches over the capacitor dielectric region. A layer of conductively doped polysilicon then completely fills the remaining volume of the containers and interconnects with all of the containers of an array. The tungsten silicide layer is received thereover, and accordingly not within the containers. One or more conductive contacts to this cell plate layer is typically made externally of the memory array, typically for providing the cell electrode at a common potential throughout the array.
Utilization of aluminum and/or hafnium oxides has tended to limit the temperature to which the substrate can be exposed subsequently. Specifically, a typical upper temperature limit is 700° C. Borophosphosilicate glass (BPSG) is a typical interlayer/interlevel dielectric which is usually deposited before and after deposition of an aluminum oxide and/or hafnium oxide. BPSG is conventionally subjected to rapid thermal processing and furnace annealing after its deposition, something which typically occurs at temperatures at or above 800° C. Such high temperature processing also advantageously provides activation of the conductivity enhancing impurity dopants within the polysilicon, something which increases the electrical conductivity of the doped polysilicon considerably. However with the present 700° C. temperature limit after deposition of aluminum oxide and/or hafnium oxide, the BPSG is subsequently deposited without furnace annealing or rapid thermal processing exposure. This results in a less than desired degree of dopant activation in the polysilicon and, correspondingly, higher resistance in the polysilicon than is desired.
While the invention was motivated in addressing the above identified issues, it is in no way so limited. The invention is only limited by the accompanying claims as literally worded, without interpretative or other limiting reference to the specification, and in accordance with the doctrine of equivalents.